|
|
|
|
| LEADER |
00786nam a2200253 a 4500 |
| 001 |
adlib96000001 |
| 003 |
ViArRB |
| 005 |
20151026132441.0 |
| 008 |
960221s1955 dcuabcdjdbkoqu001 0deng d |
| 020 |
|
|
|a 9781420051544
|
| 022 |
|
|
|
| 040 |
|
|
|a Adlib
|
| 082 |
|
|
|a 621.3.049.77
|
| 245 |
|
|
|a Verilog HDL:digitall design and modeling
|
| 250 |
|
|
|
| 260 |
|
|
|a New York
|b CRC Press
|c 2007
|
| 300 |
|
|
|a xviii,900p
|
| 500 |
|
|
|a
|
| 100 |
|
|
|a Cavanagh, Joseph
|
| 700 |
|
|
|
| 942 |
|
|
|c BK
|6 _
|
| 653 |
|
|
|a Digital electronics
|a Electronics
|a Logic circuits - computer aided design
|a Verilog -Computer hardware description language
|
| 999 |
|
|
|c 49030
|d 49030
|
| 952 |
|
|
|0 0
|1 0
|4 0
|6 621304977_CAV
|7 0
|9 61756
|a UL
|b UL
|d 2010-06-16
|l 3
|o 621.3.049.77 CAV
|p 00060736
|r 2014-02-06
|s 2013-11-07
|w 2010-06-16
|y BK
|