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00795nam a2200253 a 4500 |
| 001 |
adlib96000001 |
| 003 |
ViArRB |
| 005 |
20151026132319.0 |
| 008 |
960221s1955 dcuabcdjdbkoqu001 0deng d |
| 020 |
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|a 9780123739735
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| 022 |
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| 040 |
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|a Adlib
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| 082 |
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|a 621.9
|
| 245 |
|
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|a System-on-chip test architectures: nanometer design for testability
|
| 250 |
|
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| 260 |
|
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|a Boston
|b Morgan Kaufmann
|c 2008
|
| 300 |
|
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|a xxxiii, 856p.
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| 500 |
|
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|a
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| 100 |
|
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|a Wang, Laung-Terng
|e ed. by
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| 700 |
|
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|a Stround, Charles E.
|a Touba, Nur A.
|
| 942 |
|
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|c BK
|6 _
|
| 653 |
|
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|a Systems on a chip-Testing
|a Integrated circuits- very large scale integration- Testing
|
| 999 |
|
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|c 46032
|d 46032
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| 952 |
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|0 0
|1 0
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|6 6219_WAN
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|9 58505
|a UL
|b UL
|d 2010-06-16
|o 621.9 WAN
|p 00059065
|r 2010-06-16
|w 2010-06-16
|y BK
|