Routing congestion in VLSI circuits : estimation and optimization /

Bibliografiset tiedot
Päätekijä: Saxena, Prashant
Muut tekijät: Shelar, Rupesh S., Sapatnekar, Sachin S.
Aineistotyyppi: Printed Book
Julkaistu: New York : Springer, c2007.
Aiheet:
Integrated circuits
Routing (Computer network management)
Linkit:http://www.loc.gov/catdir/toc/fy0803/2006939848.html
http://www.loc.gov/catdir/enhancements/fy0824/2006939848-d.html

Internet

http://www.loc.gov/catdir/toc/fy0803/2006939848.html
http://www.loc.gov/catdir/enhancements/fy0824/2006939848-d.html

Samankaltaisia teoksia