Routing congestion in VLSI circuits : estimation and optimization /

Xehetasun bibliografikoak
Egile nagusia: Saxena, Prashant
Beste egile batzuk: Shelar, Rupesh S., Sapatnekar, Sachin S.
Formatua: Printed Book
Argitaratua: New York : Springer, c2007.
Gaiak:
Integrated circuits
Routing (Computer network management)
Sarrera elektronikoa:http://www.loc.gov/catdir/toc/fy0803/2006939848.html
http://www.loc.gov/catdir/enhancements/fy0824/2006939848-d.html

Internet

http://www.loc.gov/catdir/toc/fy0803/2006939848.html
http://www.loc.gov/catdir/enhancements/fy0824/2006939848-d.html

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