Routing congestion in VLSI circuits : estimation and optimization /

Manylion Llyfryddiaeth
Prif Awdur: Saxena, Prashant
Awduron Eraill: Shelar, Rupesh S., Sapatnekar, Sachin S.
Fformat: Printed Book
Cyhoeddwyd: New York : Springer, c2007.
Pynciau:
Integrated circuits
Routing (Computer network management)
Mynediad Ar-lein:http://www.loc.gov/catdir/toc/fy0803/2006939848.html
http://www.loc.gov/catdir/enhancements/fy0824/2006939848-d.html

Rhyngrwyd

http://www.loc.gov/catdir/toc/fy0803/2006939848.html
http://www.loc.gov/catdir/enhancements/fy0824/2006939848-d.html

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