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00819cam a2200217ua 4500 |
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111122s005 iinu 001 0 eeng |
| 020 |
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|a 812032756X.
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| 082 |
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|a 621.392
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| 100 |
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|a Ciletti, Michael D
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| 245 |
1 |
0 |
|a Advanced digital design with the verilog HDL /
|c Michael D Ciletti
|h Textual Documents
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| 260 |
|
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|a New Delhi:
|b Prentice-Hall of India Pvt Ltd.
|c 2005,
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| 300 |
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|a xxi,981.;
|c 25x16cms
|
| 650 |
0 |
4 |
|a Computer Hardwar Discription Language VHDL-Computer Engineering
|
| 650 |
0 |
4 |
|a Electrical engineering
|
| 650 |
0 |
4 |
|a Virus protection
|
| 653 |
|
|
|a VHDL
|
| 852 |
|
|
|t 1
|p DCS03516
|b Text Books
|k 621.392
|f 00000
|c L
|m CIL
|
| 942 |
|
|
|c BK
|
| 999 |
|
|
|c 240069
|d 240069
|
| 952 |
|
|
|0 0
|1 0
|4 0
|6 621_392000000000000
|7 0
|9 254658
|a DCS
|b DCS
|c L
|d 2019-12-12
|f 00000
|l 0
|m 0
|o 621.392
|p DCS03516
|r 2019-12-12
|t 1
|w 2019-12-12
|y BK
|