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CMOS: Circuit design, layout, and simulation /

Détails bibliographiques
Auteur principal: Baker, R. Jacob
Format: Printed Book
Langue:English
Publié: New Delhi : Prentice Hall, 1998.
Table des matières:
  • 1. Well 2. Metal layers 3. Active and poly layers 4. Mosfet 6. BSIM SPICE model 7. CMOS passive elements 8. Design verification with LASICKT 9. Analog MOSFET models 10. Digital model 11. Inverter 12. Static logic gates 13. TG and flip-flops 14.