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Computer organization and design : the hardware/software interface.
"Presents the fundamentals of hardware technologies, assembly language, computer arithmetic, pipelining, memory hierarchies and I/O"--Provided by publisher.
| Autori principali: | , |
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| Natura: | Printed Book |
| Lingua: | English |
| Edizione: | Fifth edition / |
| Serie: | Morgan Kaufmann series in computer architecture and design.
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| Soggetti: |
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| 020 | |a 9780124077263 (pbk.) | ||
| 020 | |a 0124077269 (pbk.) | ||
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| 082 | 0 | 4 | |a 004.21 PAT/C |2 23 |
| 100 | 1 | |a Patterson, David A., |e author. | |
| 245 | 1 | 0 | |a Computer organization and design : |b the hardware/software interface. |
| 250 | |a Fifth edition / |b David A. Patterson, University of California, Berkeley, John L. Hennessy, Stanford University ; with contributions by Perry alexander, the University of Kansas ... [and fifteen others]. | ||
| 300 | |a 575 pages, 194 variously numbered pages : |b illustrations ; |c 24 cm | ||
| 490 | 1 | |a The Morgan Kaufmann series in computer architecture and design | |
| 500 | |a Previous edition: 2012. | ||
| 500 | |a Rev. ed. of: Computer organization and design/John L. Hennessy, David A. Patterson. 1998. | ||
| 504 | |a Includes bibliographical references and index. | ||
| 505 | 0 | |a Computer abstractions and technology -- Instructions : language of the computer -- Arithmetic for computers -- The processor -- Large and fast : exploiting memory hierarchy -- Parallel processors from client to cloud. | |
| 520 | |a "Presents the fundamentals of hardware technologies, assembly language, computer arithmetic, pipelining, memory hierarchies and I/O"--Provided by publisher. | ||
| 650 | 0 | |a Computer organization. | |
| 650 | 0 | |a System design |x Data processing. | |
| 650 | 0 | |a Computer architecture. | |
| 700 | 1 | |a Hennessy, John L., |e author. | |
| 830 | 0 | |a Morgan Kaufmann series in computer architecture and design. | |
| 906 | |a 7 |b cbc |c copycat |d 2 |e ncip |f 20 |g y-gencatlg | ||
| 942 | |2 ddc |c BK | ||
| 955 | |b rl09 2014-06-03 z-processor |i rl09 2014-06-09 ; to BCCD | ||
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| 952 | |0 0 |1 0 |2 ddc |4 0 |6 004_210000000000000_PAT_C |7 0 |9 408154 |a DCS |b DCS |d 2018-07-09 |i 1400 |l 0 |o 004.21 PAT/C |p DCS1400 |r 2020-09-28 |w 2020-09-28 |y BK | ||