Loading...
Chip Design for Submicorn VLSI: CMOS Layout ad Simulation /
Format: | Printed Book |
---|---|
Language: | English |
Published: |
Cengage learning,
|
LEADER | 00357cam a2200109ua 4500 | ||
---|---|---|---|
008 | 130807t||||||||||| 00 ||eng c | ||
041 | 0 | |a eng | |
245 | 0 | 0 | |a Chip Design for Submicorn VLSI: CMOS Layout ad Simulation / |
260 | |b Cengage learning, | ||
942 | |c BK | ||
999 | |c 29363 |d 29363 | ||
952 | |0 0 |1 0 |4 0 |7 0 |9 31167 |a KUCL |b KUCL |d 2014-05-23 |l 0 |p NB1224 |r 2014-05-23 |w 2014-05-23 |y BK |f 00000 |