|
|
|
|
| LEADER |
00612nam a2200193 a 4500 |
| 005 |
20151026132456.0 |
| 008 |
960221s1955 dcuabcdjdbkoqu001 0deng d |
| 003 |
ViArRB |
| 080 |
|
|
|a 621.3.049.77
|b PED
|
| 100 |
|
|
|a Pedroni, Volnei A
|9 13640
|
| 245 |
|
|
|a Circuit design with VHDL
|
| 300 |
|
|
|a xii, 363p.
|
| 653 |
|
|
|a VHDL
|a Circuit design
|
| 942 |
|
|
|c BK
|6 _
|
| 260 |
|
|
|a New Delhi
|b Prentice hall
|c 2008
|9 15140
|
| 500 |
|
|
|a
|
| 020 |
|
|
|a 9788120326835
|
| 999 |
|
|
|c 49541
|d 49541
|
| 952 |
|
|
|0 0
|1 0
|2 udc
|4 0
|6 621304977_PED
|7 0
|9 62361
|a UL
|b UL
|c GEN
|d 2010-06-16
|l 6
|o 621.3.049.77 PED
|p 00063914
|r 2015-03-03
|s 2015-01-29
|w 2010-06-16
|y BK
|