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00797nam a2200253 a 4500 |
001 |
adlib96000001 |
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ViArRB |
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20151026132424.0 |
008 |
960221s1955 dcuabcdjdbkoqu001 0deng d |
020 |
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|a 9780470060704
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022 |
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040 |
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|a Adlib
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082 |
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|a 621.3.049.77
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245 |
|
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|a FSM- based digital design using verilog HDL
|
250 |
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|
260 |
|
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|a Chichester
|b John Wiley & Sons
|c 2008
|
300 |
|
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|a xiii, 391p
|
500 |
|
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|a Include CD ROMS
|
100 |
|
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|a Minns, Peter
|
700 |
|
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|a Elliott, Ian
|
942 |
|
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|c BK
|6 _
|
653 |
|
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|a Verilog (computer hardware description language)
|a Digital electronics
|a Electronics
|a Sequential machine theory
|
999 |
|
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|c 48415
|d 48415
|
952 |
|
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|0 0
|1 0
|4 0
|6 621304977_MIN
|7 0
|9 61058
|a UL
|b UL
|d 2010-06-16
|o 621.3.049.77 MIN
|p 00062044
|r 2010-06-16
|w 2010-06-16
|y BK
|